Euresys has announced the availability of a new deep learning library: EasySegment
The preferred connector for version 2.0 is the micro-BNC. Credit: Active Silicon
Chris Beynon, Active Silicon’s CTO and technical chair for the CoaXPress standard, gives an update on what’s new in v2.0
MVDK evaluation board with MIPI CSI-2 sensor and CXP interface board. Credit: Euresys
Greg Blackman finds that purchasing IP cores for FPGAs is one way to reduce time-to-market for camera production
Sensor to Image, a Euresys company, has released a MIPI CSI-2 Receiver IP core
Euresys has made available two new image analysis libraries and software tools, along with expanding its CXP-12 frame grabber range
Limited data is a common problem when training CNNs in industrial imaging applications. Petra Thanner and Daniel Soukup, from the Austrian Institute of Technology, discuss ways of working with CNNs when data is scarce
Euresys presents its custom on-board FPGA processing for Coaxlink frame grabbers
Highlights at Euresys’ China Vision show booth will include the latest CoaXPress frame grabbers, the Coaxlink Quad CXP-12, a new four-connection 12-Gbps CoaXPress 2.0 frame grabber
Euresys and Vision Research have built a high-speed camera system for imaging flow cytometry
Greg Blackman reports on the buzz surrounding embedded vision at the Vision Stuttgart trade fair, which took place from 6 to 8 November
The sensor of SWIR Vision Systems' Acuros CQD 1920 camera
Matthew Dale finds that new sensor technologies based on quantum dots are set to bring down the cost of shortwave infrared imaging
Keely Portway finds out how vision technology is playing a role in medical diagnosis
Bob McCurrach, director of standards development at AIA, updates on the progress being made in GigE Vision
Following speaking at Embedded Vision Europe, Pierre Gutierrez, lead machine learning researcher at Scortex, writes about the challenges of deploying deep learning on the factory floor
Takashi Someda, CTO at Hacarus, on the advantages of sparse modelling AI tools
Depth map from the SceneScan. Credit: Nerian Vision
Dr Konstantin Schauwecker, CEO of Nerian Vision, describes the firm’s stereo vision sensor for fast depth perception with FPGAs
MVDK evaluation board with MIPI CSI-2 sensor and CXP interface board. Credit: Euresys
Greg Blackman finds that purchasing IP cores for FPGAs is one way to reduce time-to-market for camera production
